Publications
Activity-Sensitive Flip-Flop and Latch Selection for Reduced Energy.
IEEE Transactions on VLSI Systems. 15(9), 1060-1064.
(2007). Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics.
IEEE Micro. 29(4), 8-21.
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Designing a Connectionist Network Supercomputer.
International Journal of Neural Systems.
(1993).
(2013). Designing Chip-Level Nanophotonic Interconnection Networks.
IEEE Journal on Emerging and Selected Topics in Circuits and Systems. 2(2), 137-153.
(2012). Designing Chip-Level Nanophotonic Interconnection Networks.
IEEE Journal on Emerging and Selected Topics in Circuits and Systems. 2(2), 137-153.
(2012).
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